View MGA-82563_178098.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

0.1- 6 GHz 3 V, 17 dBm Amplifier Technical Data
MGA-82563
Features
* +17.3 dBm P1 dB at 2.0 GHz +20 dBm Psat at 2.0 GHz * Single +3V Supply * 2.2 dB Noise Figure at 2.0 GHz * 13.2 dB Gain at 2.0 GHz * Ultra-miniature Package * Unconditionally Stable
Surface Mount Package SOT-363 (SC-70)
Description
Hewlett-Packard's MGA-82563 is an economical, easy-to-use GaAs MMIC amplifier that offers excellent power and low noise figure for applications from 0.1 to 6 GHz. Packaged in an ultraminiature SOT-363 package, it requires half the board space of a SOT-143 package. The input and output of the amplifier are matched to 50 (below 2:1 VSWR) across the entire bandwidth, eliminating the expense of external matching. The amplifier allows a wide dynamic range by offering a 2.2 dB NF coupled with a +31 dBm Output IP3. The circuit uses state-of-the-art PHEMT technology with proven reliability. On-chip bias circuitry allows operation from a single +3 V power supply, while resistive feedback ensures stability (K>1) over all frequencies and temperatures.
Pin Connections and Package Marking
GND 1 6 OUTPUT and Vd 5 GND 4 GND
Applications
* Buffer or Driver Amp for PCS, PHS, ISM, SATCOM and WLL Applications * High Dynamic Range LNA
82
GND 2 INPUT 3
Simplified Schematic
OUTPUT and Vd 6 INPUT 3
Note: Package marking provides orientation and identification.
BIAS BIAS
GND 1, 2, 4, 5
5965-9685E
6-208
MGA-82563 Absolute Maximum Ratings
Symbol Vd Vgd Vin Pin T ch TSTG Parameter Device Voltage, RF Output to Ground Device Voltage, Gate to Drain Range of RF Input Voltage to Ground CW RF Input Power Channel Temperature Storage Temperature Units V V V dBm C C Absolute Maximum[1] 5.0 -6.0 +0.5 to -1.0 +13 165 -65 to 150 Thermal Resistance [2]: ch-c = 180C/W
Notes: 1. Permanent damage may occur if any of these limits are exceeded. 2. TC = 25C (TC is defined to be the temperature at the package pins where contact is made to the circuit board.)
MGA-82563 Electrical Specifications, TC = 25C, ZO = 50 , Vd = 3 V
Symbol G test NFtest NF50 Parameters and Test Conditions Gain in test circuit[1] Noise Figure in test circuit[1] Noise Figure in 50 system f = 2.0 GHz f = 2.0 GHz f = 0.5 GHz f = 1.0 GHz f = 2.0 GHz f = 3.0 GHz f = 4.0 GHz f = 6.0 GHz f = 0.5 GHz f = 1.0 GHz f = 2.0 GHz f = 3.0 GHz f = 4.0 GHz f = 6.0 GHz f = 0.5 GHz f = 1.0 GHz f = 2.0 GHz f = 3.0 GHz f = 4.0 GHz f = 6.0 GHz f = 2.0 GHz f = 0.2-5.0 GHz f = 0.2-5.0 GHz mA 63 dB Units Min. 12.0 Typ. 13.2 2.2 2.3 2.2 2.2 2.2 2.4 2.7 14.7 14.5 13.5 12.1 10.7 8.8 17.4 17.5 17.3 17.1 17.0 16.8 +31 1.8:1 1.2:1 84 101 2.9 Max. Std Dev [2] 0.35 0.20
0.20
|S21|2
Gain in 50 system
dB
0.35
P1 dB
Output Power at 1 dB Gain Compression
dBm
0.54
IP3 VSWRin VSWRout Id
Output Third Order Intercept Point Input VSWR Output VSWR Device Current
dBm
1.0
Notes: 1. Guaranteed specifications are 100% tested in the circuit in Figure 10 in the Applications Information section. 2. Standard deviation number is based on measurement of at least 500 parts from three non-consecutive wafer lots during the initial characterization of this product, and is intended to be used as an estimate for distribution of the typical specification.
6-209
MGA-82563 Typical Performance, TC = 25 C, Vd = 3 V
16 14 5 19
NOISE FIGURE (dB)
12
4
18
GAIN (dB)
10 8 6 4 2 0 0 1 2 3 4 5 6 FREQUENCY (GHz) TA = +85C TA = +25C TA = -40C
3
P1 dB (dBm)
TA = +85C TA = +25C TA = -40C 0 1 2 3 4 5 6
17
2
16 TA = +85C TA = +25C TA = -40C 0 1 2 3 4 5 6
1
15
0 FREQUENCY (GHz)
14 FREQUENCY (GHz)
Figure 1. 50 Power Gain vs. Frequency and Temperature.
Figure 2. Noise Figure (into 50 ) vs. Frequency and Temperature.
Figure 3. Output Power @ 1 dB Gain Compression vs. Frequency and Temperature.
16 14
5
19
NOISE FIGURE (dB)
12
4
18
GAIN (dB)
10 8 6 4 2 0 0 1 2 3 4 5 6 FREQUENCY (GHz) Vd = 3.3V Vd = 3.0V Vd = 2.7V
P1 dB (dBm)
Vd = 3.3V Vd = 3.0V Vd = 2.7V 0 1 2 3 4 5 6
3
17
2
16 Vd = 3.3V Vd = 3.0V Vd = 2.7V 0 1 2 3 4 5 6
1
15
0 FREQUENCY (GHz)
14 FREQUENCY (GHz)
Figure 4. 50 Power Gain vs. Frequency and Voltage.
Figure 5. Noise Figure (into 50 ) vs. Frequency and Voltage.
Figure 6. Output Power @ 1 dB Gain Compression vs. Frequency and Voltage.
4 3.5 3 2.5 2 1.5 1 Input
110 100
16 14
DEVICE CURRENT (mA)
90 80 70 60 50 40 30 20 10 TA = +85C TA = +25C TA = -40C
GAIN and NF (dB)
12 10 8 6 4
Gain
VSWR (n:1)
Output
NF 2 0
0
1
2
3
4
5
6
0
1
2
3
4
0
1
2
3
4
5
6
FREQUENCY (GHz)
DEVICE VOLTAGE (V)
FREQUENCY (GHz)
Figure 7. Input and Output VSWR into 50 vs. Frequency.
Figure 8. Device Current vs. Voltage and Temperature.
Figure 9. Minimum Noise Figure and Associated Gain vs. Frequency.
6-210
MGA-82563 Typical Scattering Parameters[1], TC = 25C, Z O = 50 , Vd = 3 V
Freq. GHz 0.1 0.2 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 S11 Mag 0.48 0.35 0.29 0.29 0.29 0.29 0.29 0.28 0.28 0.29 0.30 0.32 0.34 0.36 0.38 0.40 Ang -39 -35 -37 -57 -78 -99 -118 -138 -158 -177 166 151 136 123 110 97 dB 15.71 14.81 14.34 13.95 13.50 12.99 12.45 11.84 11.24 10.67 10.11 9.58 9.07 8.57 8.06 7.51 S21 Mag 6.10 5.50 5.21 4.98 4.73 4.46 4.19 3.91 3.65 3.42 3.20 3.01 2.84 2.68 2.53 2.37 Ang 164 165 159 144 128 114 99 86 74 61 50 38 27 16 5 -5 dB -23 -22 -22 -22 -22 -22 -21 -21 -21 -20 -20 -19 -19 -19 -19 -18 S12 Mag 0.070 0.076 0.079 0.080 0.082 0.085 0.089 0.093 0.098 0.103 0.107 0.112 0.117 0.121 0.125 0.126 Ang 27 14 6 3 2 1 -1 -3 -6 -9 -13 -18 -23 -29 -35 -41 Mag 0.16 0.12 0.11 0.11 0.10 0.10 0.10 0.11 0.12 0.13 0.15 0.16 0.18 0.19 0.22 0.24 S22 Ang -99 -134 177 156 142 131 124 118 111 106 100 94 87 82 74 66 K Factor 1.02 1.20 1.29 1.33 1.37 1.41 1.44 1.48 1.51 1.52 1.53 1.54 1.55 1.54 1.55 1.59
MGA-82563 Typical Noise Parameters[1] TC = 25C, Z O = 50 , Vd = 3 V
Frequency GHz 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 NFO dB 2.10 2.10 2.10 2.12 2.12 2.15 2.16 2.16 2.19 2.18 2.19 2.23 2.28 2.39 opt Mag. 0.15 0.15 0.14 0.15 0.15 0.144 0.14 0.15 0.17 0.20 0.22 0.25 0.27 0.29 Ang. 25 45 65 75 94 113 134 155 177 -166 -152 -138 -125 -111 Rn / 50 -- 1.20 0.60 0.29 0.27 0.25 0.23 0.21 0.19 0.18 0.18 0.18 0.19 0.23 0.28
Note: 1. Reference plane per Figure 11 in Applications Information section.
6-211
MGA-82563 Applications Information
Introduction
This medium power GaAs MMIC amplifier was developed for commercial wireless applications from 100 MHz to 6 GHz. The MGA-82563 runs on only 3 volts and typically requires only 84 mA to deliver over 17 dBm of output power at 1 dB gain compression. The 17.3 dBm output power (P1 dB ) makes the MGA-82563 extremely useful for pre-driver and driver stages in transmit cascades or for final output stages in lower power systems. For transmitter gain stage applications that require even higher output power, the MGA-82563 can provide 100 mW (20 dBm) of saturated output power with a power added efficiency approaching 50%. The low cost of the MGA-82563 makes it feasible to power combine two (or more) devices for even higher output power amplifiers. The MGA-82563 offers an excellent combination of high linearity (+31 dBm output IP3) and very low noise figure (2.2 dB) for applications requiring a very high dynamic range. The MGA-82563 uses resistive feedback to simultaneously achieve flat gain over a wide bandwidth and to match the input and output impedances to 50 . The MGA-82563 is also unconditionally stable (K>1) over its entire frequency range, making it both very easy to use and yielding consistent performance in the manufacture of high volume wireless products.
An innovative internal bias circuit regulates the device's internal current to enable the MGA-82563 to operate over a wide temperature range with a single, positive power supply of 3 volts. The MGA-82563 will operate with reduced power and gain with a bias supply as low as 1.5 volts.
Specifications and Statistical Parameters
Several categories of parameters appear within this data sheet. Parameters may be described with values that are either "minimum or maximum," "typical," or "standard deviations." The values for parameters are based on comprehensive product characterization data, in which automated measurements are made on of a minimum of 500 parts taken from 3 nonconsecutive process lots of semiconductor wafers. The data derived from product characterization tends to be normally distributed, e.g., fits the standard "bell curve." Parameters considered to be the most important to system performance are bounded by minimum or maximum values. For the MGA-82563, these parameters are: Gain (Gtest), Noise Figure (NFtest), and Device Current (Id). Each of these guaranteed parameters is 100% tested. Values for most of the parameters in the table of Electrical Specifications that are described by typical data are the mathematical mean ( ), of the normal distribution taken from the characterization data. For parameters where measurements or mathematical averaging may not be practical, such as the Noise and S-parameter tables or performance curves, the data represents a nominal part taken from the "center" of the characterization distribution. Typical values are intended to be used as a basis for electrical design.
Test Circuit
The circuit shown in Figure 10 is used for 100% RF testing of Gain and Noise Figure. The test circuit is merely a 50 input/output PC board with a RFC at the output to apply DC bias to the device under test. Tests in this circuit are used to guarantee the NFtest and Gtest parameters shown in the table of Electrical Specifications.
100 pF RF INPUT RF OUTPUT 22 nH RFC Vd 100 pF
Figure 10. Test Circuit.
Phase Reference Planes
The positions of the reference planes used to specify the S-Parameters and Noise Parameters for this device are shown in Figure 11. As seen in the illustration, the reference planes are located at the point where the package leads contact the test circuit.
REFERENCE PLANES
TEST CIRCUIT
Figure 11. Phase Reference Planes.
82
6-212
RF Input
Standard statistics tables or calculations provide the probability of a parameter falling between any two values, usually symmetrically located about the mean. Referring to Figure 12 for example, the probability of a parameter being between 1 is 68.3%; between 2 is 95.4%; and between 3 is 99.7%.
Figure13. RFLayout.
In addition to the RF considerations, the use of multiple vias for grounding is important for the purpose of providing a lower resistance thermal path to the heatsink. It is recommended that the PCB pads for the ground pins not be connected together underneath the body of the package. PCB traces hidden under the package cannot be adequately inspected for SMT solder quality.
68%
95% 99% -3 -2 -1 Mean () +1 +2 (typical) Parameter Value +3
PCB Material
FR-4 or G-10 printed circuit board materials are a good choice for most low cost wireless applications. Typical board thickness is 0.020 to 0.031 inches. The width of the 50 microstriplines on PC boards in this thickness range is also very convenient for mounting chip components such as the series inductor at the input or DC blocking and bypass capacitors. For higher frequencies or for noise figure critical applications, the additional cost of PTFE/glass dielectric materials may be warranted to minimize transmission line loss at the amplifier's
Figure12. NormalDistribution.
RF Layout
The RF layout in Figure 13 is suggested as a starting point for microstripline designs using the MGA-82563 amplifier. Adequate grounding is needed to obtain optimum performance and to maintain stability. All of the ground pins of the MMIC should be connected to the RF groundplane on the backside of the PCB by means of plated
6-213
82
To assist designers in optimizing not only the immediate circuit using the MGA-82563, but to also optimize and evaluate trade-offs that affect a complete wireless system, the standard deviation ( ) is provided for many of the Electrical Specifications parameters (at 25) in addition to the mean. The standard deviation is a measure of the variability about the mean. It will be recalled that a normal distribution is completely described by the mean and standard deviation.
through holes (vias) that are placed near the package terminals. As a minimum, one via should be located next to each ground pin to ensure good RF grounding. It is a good practice to use multiple vias to further minimize ground path inductance.
input. A 0.5 inch length of 50 microstripline on FR-4, for example, has approximately 0.3 dB loss at 4 GHz. This loss will add directly to the noise figure of the MGA-82563.
Biasing
The MGA-82563 is a voltagebiased device and is designed to operate from a single, +3 volt power supply with a typical current drain of 84 mA. The internal current regulation circuit allows the amplifier to be operated with voltages as low as +1.5 volts. Refer to the section titled "Operation at Bias Voltages Other than 3 Volts" for information on performance and precautions when using other voltages.
50 RF Output and Vd 50
Typical Application Example
The printed circuit layout in Figure 14 can serve as a design guide. This layout is a microstripline design (solid groundplane on the backside of the circuit board) with a 50 input and output. The circuit is fabricated on 0.031-inch thick FR-4 dielectric material. Plated through holes (vias) are used to bring the ground to the top side of the circuit where needed. Multiple vias are used to reduce the inductance of the paths to ground.
H
OUT
IN
+V
MGA-8-A
Figure14. PCBLayout.
A schematic diagram of the application circuit is shown in Figure 15. DC blocking capacitors (C1 and C2) are used at the input and output of the MMIC to isolate the device from adjacent circuits. While the input terminal of the MGA-82563 is at ground potential, it is not a current sink. If the input is connected to a preceding stage that has a voltage present, the use of the DC blocking capacitor (C1) is required.
C2 C4 RFC RF Input C1 C2 RF Output Vd
prevent gain dips or peaks in the response of the amplifier. An additional bypass capacitor, C4, may be added to the bias line near the Vd connection to eliminate unwanted feedback through bias lines that could cause oscillation. C4 will not normally be needed unless several stages are cascaded using a common power supply. When multiple bypass capacitors are used, consideration should be given to potential resonances. It is important to ensure that the capacitors when combined with additional parasitic L's and C's on the circuit board do not form resonant circuits. The addition of a small value resistor in the bias supply line between bypass capacitors will often "de-Q" the bias circuit and eliminate the effect of a resonance. The value of the DC blocking and RF bypass capacitors (C1 - C3) should be chosen to provide a small reactance (typically <5 ohms) at the lowest operating frequency. The reactance of the
RF choke (RFC) should be high (e.g., several hundred ohms) at the lowest frequency of operation. The MGA-82563's response at low frequencies is limited to approximately 100 MHz by the size of capacitors integrated on the MMIC chip. The input and output of the MGA-82563 are well matched to 50 . Without external matching elements, the input VSWR of the MGA-82563 is 2.0:1 from 300 MHz to 6 GHz and the Output VSWR is 1.6:1 from 100 MHz through 6 GHz.
For applications requiring minimum noise figure (NFo), some improvement over a 50 match is possible by matching the signal input to the optimum noise match impedance, o, as specified in the "Typical Noise Parameters" table. The data in the table shows the noise match to be very close to 50 .
Figure15. SchematicDiagram.
DC bias is applied to the MGA-82563 through the RF Output pin. An inductor (RFC), or length of high impedance transmission line (preferably /4 at the band center), is used to isolate the RF from the DC supply. The power supply is bypassed to ground with capacitor C3 to keep RF off of the DC lines and to
The completed application amplifier with all components and SMA connectors is shown in Figure 16.
H
C1 C2 IN RFC C3 +V OUT
MGA-8-A
Figure 16. Complete Application Circuit.
C4
6-214
Pout and IP3 (dBm), PAE (%)
Operation in Saturation for Higher Output Power
For applications such as predriver, driver, and output stages in transmitters, the MGA-82563 can be operated in saturation to deliver up to 100 mW (20 dBm) of output power. The power added efficiency approaches 50% at these power levels. There are several design considerations related to reliability and performance that should be taken into account when operating the amplifier in saturation. First of all, it is important that the stage preceding the MGA-82563 not overdrive the device. Referring to the "Absolute Maximum Ratings" table, the maximum allowable input power is +13 dBm. This should be regarded as the input power level above which the device could be permanently damaged. Driving the amplifier into saturation will also affect electrical performance. Figure 17 presents the Output Power, Third Order Intercept Point (Output IP3), and Power Added Efficiency (PAE) as a function of Input Power. This data represents performance into a 50 load. Since the output impedance of the device changes when driven into saturation, it is possible to obtain even more output power with a "power match." The optimum impedance match for maximum output power is dependent on specific frequency and actual output power level and can be arrived at empirically.
50 PAE 40 IP3 30
mental response. This data was measured in the test circuit in Figure 10.
Pout, 3rd, 5th, 7th HARMONICS (dBm)
30 20 10 0 -10 -20 -30 -40 3rd -50 5th -60 -30 -15 -10 -5 7th 0 5 10 15 20 Pout
20 Power 10 0 -10 -20
-15
-10
-5
0
5
10
POWER IN (dBm)
Figure17.OutputPower,IP 3,and Power-Added-Efficiencyvs.Input Power. (V d =3.0V)
FREQUENCY (GHz)
As the input power is increased beyond the linear range of the amplifier, the gain becomes more compressed. Gain as a function of either input or output power may be derived from Figure 17. Gain compression renders the amplifier less sensitive to variations in the power level from the preceding stage. This can be a benefit in systems requiring fairly constant output power levels from the MGA-82563. Increased efficiency (up to 45% at full output power) is another benefit of saturated operation. At high output power levels, the bias supply current drops by about 15%. This is normal and is taken into account for the PAE data in Figure 17. Like other active devices, the intermodulation products of the MGA-82563 increase as the device is driven further into nonlinear operation. The 3rd, 5th, and 7th order intermodulation products of the MGA-82563 are shown in Figure 18 along with the funda-
Figure18.IntermodulationProducts vs.InputPower.(V d =3.0V)
Operation at Bias Voltages Other than 3 Volts While the MGA-82563 is designed primarily for use in +3 volt applications, the internal bias regulation circuitry allows it to be operated with power supply voltages from +1.5 to +4 volts. Performance of Gain, Noise Figure, and Output Power over a wide range of bias voltage is shown in Figure 19. (This data was measured in the test circuit in Figure 10.) As can be seen, the gain and NF are fairly flat, but an increase in output power is possible by using higher voltages. The use of +4 volts increases the P1dB by over 2 dBm. If bias voltages greater than 3 volts are used, particular attention should be given to thermal management. Refer to the "Thermal Design Considerations" section for more details.
6-215
22 20 18 NF, GAIN, P1 dB (dB) 16 14 12 10 8 6 4 2 0 0 1 2 3 4 NF Gain Power
The use of the series diode approach has the advantage of less dependency on current variation in the amplifiers since the forward voltage drop of a diode is somewhat current independent. Reverse breakdown diodes (e.g., Zener diodes) could also be used as in Figure 20c. However, care should be taken to ensure that the noise generated by diodes in either Zener or reverse breakdown is adequately filtered (e.g., bypassed to ground) such that the diode's noise is not added to the amplifier's signal. Note that the voltage-dropping component in each of these three methods must be able to safely dissipate up to 200 mW.
SUPPLY VOLTAGE (V)
Figure19. Gain,NoiseFigure,and OutputPowervs.SupplyVoltage.
There are several means of biasing the MGA-82563 at 3 volts in systems that use higher power supply voltages. The simplest method, shown in Figure 20a, is to use a series resistor to drop the device voltage to 3 volts. For example, a 24 resistor will drop a 5-volt supply to 3 volts at the nominal current of 84 mA. Some variation in performance could be expected for this method due to variations in current within the specified 63 to 101 mA min/max range.
+5 V +5 V +5 V
106 hours (114 years) for a channel temperature of 150 C. The maximum device current specification is 101 mA at 3 volts. From Figure 8, it can be seen that the current will increase by approximately 9 mA to 110 mA at an elevated temperature. The device power dissipation is then: Pd = 3.0 volts * 110 mA, which is equal to 330 mW. The channel-to-"case" thermal resistance (ch-c) from the "Absolute Maximum Ratings" table is 180 C/watt. Note that "case" is defined as the interface between the SOT-363 package pins and the mounting surface (i.e., PCB). The temperature rise from the mounting surface to the MMIC channel is: T = 0.330 watt * 180 C/watt, or 59 C. To achieve the MTTF goal of 106 hours, the circuit to which the device is mounted should not exceed: Tcase = 150 - 59 C, which is equal to 91 C. For other MTTF goals and/or operating temperatures, HewlettPackard publishes reliability data sheets based on operating life tests to enable designers to arrive at a thermal design for their particular operating environment. For a reliability data sheet covering the MGA-82563, request Hewlett-Packard publication number 5964-4128E, titled "GaAs MMIC Amplifier Reliability Data." (This reliability data sheet covers the MGA-82563 as part of this family of GaAs MMICs.)
Thermal Design Considerations
Good thermal design is important in the application of medium power devices, especially when housed in miniature packages such as the SOT-363/SC-70. As previously mentioned in the "RF Layout" section, the use of multiple vias near all of the ground pins provides an important part of the heatsinking function. For reliable operation, the channel temperature should be kept within the 165 C indicated in the "Absolute Maximum Ratings" table. As an illustration of a thermal calculation, consider the example of a MGA-82563 biased at 3.0 volts for an application with a MTTF goal of 106 hours (114 years). Operating life tests have established a MTTF in excess of
24
Silicon Diodes
Zener Diode
(a)
(b)
(c)
Figure20. BiasingFromHigher SupplyVoltages.
A second method illustrated in Figure 20b, is to use forwardbiased diodes in series with the power supply. For example, three silicon diodes connected in series will drop a 5-volt supply to approximately 3 volts.
6-216
SOT-363 PCB Footprint
A recommended PCB pad layout for the miniature SOT-363 (SC-70) package used by the MGA-82563 is shown in Figure 21 (dimensions are in inches). This layout provides ample allowance for package placement by automated assembly equipment without adding parasitics that could impair the high frequency RF performance of the MGA-82563. The layout is shown with a nominal SOT-363 package footprint superimposed on the PCB pads.
0.026
material, process, and equipment factors, including: method of heating (e.g., IR or vapor phase reflow, wave soldering, etc.) circuit board material, conductor thickness and pattern, type of solder alloy, and the thermal conductivity and thermal mass of components. Components with a low mass, such as the SOT-363 package, will reach solder reflow temperatures faster than those with a greater mass. The MGA-82563 is has been qualified to the time-temperature profile shown in Figure 22. This profile is representative of an IR reflow type of surface mount assembly process. After ramping up from room temperature, the circuit board with components attached to it (held in place with solder paste) passes through one or more preheat zones. The preheat zones increase the temperature of the board and components to prevent thermal shock and begin evaporating solvents from the solder paste. The reflow zone briefly elevates the temperature sufficiently to produce a reflow of the solder.
The rates of change of temperature for the ramp-up and cooldown zones are chosen to be low enough to not cause deformation of the board or damage to components due to thermal shock. The maximum temperature in the reflow zone (TMAX) should not exceed 235 C. These parameters are typical for a surface mount assembly process for the MGA-82563. As a general guideline, the circuit board and components should be exposed only to the minimum temperatures and times necessary to achieve a uniform reflow of solder.
Electrostatic Sensitivity
0.075 0.035
0.016
Figure21. PCBPadLayout (dimensionsininches).
SMT Assembly
Reliable assembly of surface mount components is a complex process that involves many
250 TMAX 200
TEMPERATURE (C)
150 Reflow Zone 100 Preheat Zone 50 0 0 60 120 180 240 300 TIME (seconds) Cool Down Zone
GaAs MMICs are electrostatic discharge (ESD) sensitive devices. Although the MGA-82563 is robust in design, permanent damage may occur to these devices if they are subjected to high energy electrostatic discharges. Electrostatic charges as high as several thousand volts (which readily accumulate on the human body and on test equipment) can discharge without detection and may result in degradation in performance or failure. The MGA-82563 is a ESD Class 1 device. Therefore, proper ESD precautions are recommended when handling, inspecting, and assembling these devices to avoid damage.
Figure 22. Surface Mount Assembly Profile.
6-217
Package Dimensions
Outline 63 (SOT-363/SC-70)
1.30 (0.051) REF.
2.20 (0.087) 2.00 (0.079)
1.35 (0.053) 1.15 (0.045)
0.650 BSC (0.025) 2.20 (0.087) 1.80 (0.071) 0.10 (0.004) 0.00 (0.00) 0.425 (0.017) TYP.
0.30 REF.
1.00 (0.039) 0.80 (0.031) 0.25 (0.010) 0.15 (0.006)
10
0.30 (0.012) 0.10 (0.004)
0.20 (0.008) 0.10 (0.004)
DIMENSIONS ARE IN MILLIMETERS (INCHES)
MGA-82563 Part Number Ordering Information
Part Number MGA-82563-TR1 MGA-82563-BLK No. of Devices 3000 100 Container 7" Reel antistatic bag
6-218
Device Orientation
REEL TOP VIEW 4 mm END VIEW
CARRIER TAPE USER FEED DIRECTION COVER TAPE
8 mm
82
82
82
82
Tape Dimensions and Product Orientation
For Outline 63
P P0 D P2
E
F W C
D1 t1 (CARRIER TAPE THICKNESS) Tt (COVER TAPE THICKNESS)
8 MAX.
K0
5 MAX.
A0
B0
DESCRIPTION CAVITY LENGTH WIDTH DEPTH PITCH BOTTOM HOLE DIAMETER DIAMETER PITCH POSITION WIDTH THICKNESS WIDTH TAPE THICKNESS CAVITY TO PERFORATION (WIDTH DIRECTION) CAVITY TO PERFORATION (LENGTH DIRECTION)
SYMBOL A0 B0 K0 P D1 D P0 E W t1 C Tt F P2
SIZE (mm) 2.24 0.10 2.34 0.10 1.22 0.10 4.00 0.10 1.00 + 0.25 1.55 0.05 4.00 0.10 1.75 0.10 8.00 0.30 0.255 0.013 5.4 0.10 0.062 0.001 3.50 0.05 2.00 0.05
SIZE (INCHES) 0.088 0.004 0.092 0.004 0.048 0.004 0.157 0.004 0.039 + 0.010 0.061 0.002 0.157 0.004 0.069 0.004 0.315 0.012 0.010 0.0005 0.205 0.004 0.0025 0.00004 0.138 0.002 0.079 0.002
PERFORATION
CARRIER TAPE COVER TAPE DISTANCE
6-219

▲Up To Search▲

Price & Availability of MGA-82563

	To Download MGA-82563 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .